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Audio & Video

The audio and video connector arrangement varies across Amiga models. The A500 and A1000 provide composite video via RCA (CINCH) connectors, while the A2000 has no composite video output — only a header for an optional video modulator or Genlock adapter.

Composite Video

On the A1000, the composite video signal is a full FBAS (color composite) signal, compatible with most monitors. On the A500, cost savings resulted in a simpler BAS signal (monochrome composite only). Early A1000 models without a French keyboard output NTSC rather than PAL, which appears as black-and-white with interference lines on PAL monitors.

The video output is buffered through a transistor stage with a 75-ohm output impedance, providing permanent short-circuit protection.

Stereo Audio

Audio is carried on two RCA connectors on all models:

Audio RCA Connectors
RedRight stereo channel
WhiteLeft stereo channel

The outputs have a 1 Kohm output impedance and can be connected to any standard amplifier (AUX, TAPE, or CD input). They are short-circuit protected with an internal 36-ohm load resistor.

A1000 TV Modulator Connector

The A1000 has an additional 8-pin DIN audio/video connector (identical to the C64 modulator connector) intended for an RF modulator to connect a television. It carries both video and audio, plus a +12V supply for the modulator. The audio pins on this connector have a 1 Kohm output impedance but no internal load resistor, resulting in approximately four times the unloaded signal level compared to the RCA outputs.

A1000 DIN-8 TV Modulator Pinout
Pin 1— (unused)
Pin 2GND
Pin 3Left audio channel
Pin 4Composite video output
Pin 5GND
Pin 6— (unused)
Pin 7+12V (modulator power supply)
Pin 8Right audio channel
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RGB Video

The RGB connector is a 23-pin D-sub and is identical across all three Amiga models. It supports analog RGB monitors (like the Amiga monitor), digital RGB monitors, and special devices such as Genlock adapters.

RGB Connector Pinout (23-pin D-sub)
Pin 1XCLK — External clock input (active when XCLKEN is LOW)
Pin 2XCLKEN — External clock enable (active LOW)
Pin 3R — Analog Red (75 ohm, transistor-buffered)
Pin 4G — Analog Green (75 ohm, transistor-buffered)
Pin 5B — Analog Blue (75 ohm, transistor-buffered)
Pin 6DI — Digital Intensity
Pin 7DB — Digital Blue (TTL level, 47 ohm)
Pin 8DG — Digital Green (TTL level, 47 ohm)
Pin 9DR — Digital Red (TTL level, 47 ohm)
Pin 10CSYNC — Composite sync (75 ohm, transistor-buffered)
Pin 11HSY — Horizontal sync (bidirectional, TTL level, 47 ohm)
Pin 12VSY — Vertical sync (bidirectional, TTL level, 47 ohm)
Pin 13GND
Pin 14ZD — Zero detect (background indicator for Genlock)
Pin 15C1U — 3.58 MHz clock output
Pin 16–20GND
Pin 21-5V
Pin 22+12V
Pin 23+5V

Analog RGB Signals

For connection to an analog RGB monitor (such as the Commodore 1084), pins 3 (R), 4 (G), 5 (B), and 10 (CSYNC) are used. Denise's digital RGB output is converted to analog through a 4-bit DAC. The composite sync signal from Agnus is a mix of the vertical and horizontal sync signals. All four outputs have a 75-ohm output impedance and are transistor-buffered for short-circuit protection.

Digital RGB Signals

Pins 6–9 provide digital RGB signals for digital monitors. These come from Denise's digital RGB output, buffered through a 74HC244. The color signals are connected to Denise's upper bits (e.g., DB is connected to B3). All four signals have a 47-ohm output impedance at TTL levels.

Sync Signals

The HSY and VSY pins are bidirectional. In normal operation, they output horizontal and vertical sync from Agnus (TTL level, 47-ohm impedance, directly connected to Agnus pins). Sync signals are active-low — normally at 5V, going to 0V during sync pulses.

When Agnus's Genlock bit is enabled, these pins switch to input mode. The Amiga then synchronizes its video timing to external sync signals fed in through HSY and VSY — enabling genlocking with an external video source.

Zero Detect (ZD)

The ZD signal goes LOW whenever the currently displayed pixel is the background color (color register 0). This is used by Genlock adapters to key external video behind the Amiga's display. During vertical blank (VSY=0), ZD carries the GAUD bits (Genlock Audio Enable) from register $100 (BPLCON0), used as an audio switch by the Genlock interface.

External Clock

The C1U pin outputs a 3.58 MHz clock identical to the custom chip CLK signal. The XCLK and XCLKEN pins allow feeding an external master clock into the Amiga. All Amiga clocks derive from a 28 MHz oscillator, which can be replaced by an external clock via XCLK when XCLKEN is driven LOW. Pin 13 (GND) serves as the clock ground reference.

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Parallel Port (Centronics)

The Centronics parallel port uses a 25-pin D-sub connector. On the A500 and A2000, the pinout is PC-compatible — standard PC parallel printer cables work directly. The A1000 has a different pinout (notably pin 23 carries +5V instead of GND), so connecting a standard cable would cause a short circuit. A custom cable is required for A1000 printer connections.

Centronics Parallel Port Pinout (A500/A2000)
Pin 1STROBE — Data valid (output, active LOW, 1.4 µs pulse)
Pin 2Data bit 0 (bidirectional)
Pin 3Data bit 1 (bidirectional)
Pin 4Data bit 2 (bidirectional)
Pin 5Data bit 3 (bidirectional)
Pin 6Data bit 4 (bidirectional)
Pin 7Data bit 5 (bidirectional)
Pin 8Data bit 6 (bidirectional)
Pin 9Data bit 7 (bidirectional)
Pin 10/ACK — Acknowledge from printer (input, active LOW, 1 µs pulse)
Pin 11BUSY — Printer busy (bidirectional)
Pin 12POUT — Paper out (bidirectional)
Pin 13SELECT — Printer online (bidirectional)
Pin 14+5V
Pin 15— (unused)
Pin 16RESET (output)
Pin 17–25GND

CIA-A Connection Mapping

All parallel port signals are routed through CIA-A:

Centronics to CIA-A Signal Mapping
STROBE (pin 1)CIA-A pin 18 — PC (handshake output)
Data 0–7 (pins 2–9)CIA-A PB0–PB7 (pins 10–17)
/ACK (pin 10)CIA-A PB8 (pin 24)
BUSY (pin 11)CIA-B PA0 and SP (pins 2, 39)
POUT (pin 12)CIA-B PA1 and CNT (pins 3, 40)
SELECT (pin 13)CIA-B PA2 (pin 4)

Transfer Protocol

When a valid data byte is placed on pins 2–9, the STROBE signal pulses LOW for 1.4 microseconds, signaling the printer that data is ready. The printer acknowledges by pulsing /ACK LOW for 1 microsecond. If the printer asserts BUSY, the Amiga waits until BUSY is deasserted before sending the next byte. POUT indicates paper-out, and SELECT indicates whether the printer is online (LOW) or offline (HIGH).

The parallel port is well-suited for expansion hardware such as sound digitizers, since all data pins can be programmed as either inputs or outputs through the CIA direction registers.

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Serial Port (RS-232)

The serial port uses a 25-pin D-sub connector and provides a full RS-232 interface plus several non-standard signals.

RS-232 Serial Port Pinout (A500/A2000)
Pin 1GND — Frame ground (protective earth)
Pin 2TXD — Transmit Data (output, from Paula)
Pin 3RXD — Receive Data (input, to Paula)
Pin 4RTS — Request To Send (output)
Pin 5CTS — Clear To Send (input)
Pin 6DSR — Data Set Ready (input)
Pin 7GND — Signal ground
Pin 8CD — Carrier Detect (input, for modems)
Pin 9+12V
Pin 10-12V
Pin 11AUDOUT — Left audio channel output (1 Kohm impedance)
Pin 12–17— (unused)
Pin 18AUDIN — Audio input (47 ohm, connected to Paula AUDR)
Pin 19— (unused)
Pin 20DTR — Data Terminal Ready (output)
Pin 21RI — Ring Indicator (input, linked to Centronics SELECT via transistor)
Pin 22–25— (unused)

RS-232 Signal Routing

The data lines TXD and RXD connect directly to Paula's serial data pins. The five handshaking signals are routed through CIA-B port A:

RS-232 Handshake to CIA-B Mapping
DSRCIA-B PA3
CTSCIA-B PA4
CDCIA-B PA5
RTSCIA-B PA6
DTRCIA-B PA7

RS-232 signals are not connected directly to the CIAs — they pass through level converters (1488 output drivers, 1489A input receivers) that translate between TTL and RS-232 voltage levels. The output drivers use +12V to -5V swing. Input receivers accept -12V to +0.5V as LOW, and 3V to 25V as HIGH.

RS-232 conventions require handshake signals to be active HIGH, while TXD and RXD use negative logic for mark (1). Since the output drivers invert the signal, the corresponding CIA-B port bits are active-low — a 0 in the CIA register produces a HIGH on the RS-232 line.

Audio Pass-through

The AUDOUT pin carries the left audio channel with a 1 Kohm output impedance. The AUDIN pin (47-ohm impedance) feeds directly into Paula's right audio input (AUDR). An external audio signal entering through AUDIN passes through Paula's low-pass filter and emerges from the right audio RCA output.

A1000 Differences

The A1000 serial port has additional non-standard signals:

A1000-Specific Serial Port Pins
Pin 14-5V
Pin 15AUDOUT (audio output, replaces pin 11)
Pin 16AUDIN (audio input, replaces pin 18)
Pin 17E — 716 KHz bus clock (buffered from 68000)
Pin 18/INT2 — Level 2 interrupt input (connected to Paula)
Pin 21+5V
Pin 23+12V
Pin 24MCLK — 3.58 MHz master clock
Pin 25/RESET
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External Floppy Drive

The external floppy connector is a 23-pin D-sub and uses the Shugart bus standard, supporting up to three external drives (DF1–DF3) in addition to the internal drive (DF0).

External Floppy Connector Pinout (23-pin D-sub)
Pin 1/RDY — Drive ready (input)
Pin 2/DKRD — Disk read data (input, connected to Paula)
Pin 3–7GND
Pin 8/MTRX — Motor control (output, active LOW)
Pin 9/SEL2 — Drive DF2 select (output)
Pin 10/DRES — Drive reset (output, connected to system RESET)
Pin 11/CHNG — Disk changed (input)
Pin 12+5V
Pin 13/SIDE — Side select (output: HIGH = side 0, LOW = side 1)
Pin 14/WPRO — Write protect (input: LOW = protected)
Pin 15/TK0 — Track 0 indicator (input: LOW = head on track 0)
Pin 16/DKWE — Disk write enable (output: LOW = write mode)
Pin 17/DKWD — Disk write data (output, from Paula)
Pin 18/STEP — Head step pulse (output)
Pin 19/DIR — Head direction (output: LOW = inward, HIGH = outward)
Pin 20/SEL3 — Drive DF3 select (output)
Pin 21/SEL1 — Drive DF1 select (output)
Pin 22/INDEX — Index pulse (input, once per disk revolution)
Pin 23+12V

Motor Control via Flip-Flop

The MTRX signal does not directly control individual drive motors. Instead, each drive has a flip-flop that latches the MTRX state when its SEL line goes LOW. This allows independent motor control for each drive. For example, to start the internal drive's motor: set MTRX to 0, then pulse SEL0 LOW. The flip-flop captures the motor state; subsequently changing MTRX does not affect that drive until SEL0 is pulsed again.

The internal drive's flip-flop is on the motherboard. External drives require their own flip-flop circuit — typically built with a 74LS74 and a 74LS38 NAND gate.

Drive Identification

When the motor is off and a drive is selected, a special 32-bit identification mode is available. To initiate identification, the motor signal is briefly toggled to reset the drive's shift register. Then, each data bit is read by cycling SEL LOW and reading the RDY signal. This is repeated 32 times (MSB first). Since signals are active-low, the bits must be inverted.

Drive Identification Codes
$00000000No drive connected
$FFFFFFFFStandard 3.5-inch drive
$555555555.25-inch drive, 2x40 tracks

In practice, only the first two bits need to be read: 00 = no drive, 11 = 3.5-inch, 01 = 5.25-inch.

CIA Connections

The four input signals (/CHNG, /WPRO, /TK0, /RDY) connect to CIA-A PA4–PA7. The eight output signals (/STEP, /DIR, /SIDE, /SEL0–/SEL3, /MTR) come from CIA-B PB0–PB7. Read/write data signals (/DKRD, /DKWD, /DKWE) connect directly to Paula. All signals use open-collector drivers (7407 type) and are active-low.

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Game Ports

The two game ports are 9-pin D-sub connectors (DB-9) that accept mice, joysticks, trackballs, paddles, and light pens. Gameport 0 is on the left, Gameport 1 on the right. They are structurally identical except that Gameport 0 also connects to Agnus's light pen (LP) input.

Game Port Pinout (9-pin D-sub)
Pin 1Forward / Mouse V-pulse (input)
Pin 2Back / Mouse H-pulse (input)
Pin 3Left / Mouse VQ-pulse / Paddle left button (input)
Pin 4Right / Mouse HQ-pulse / Paddle right button (input)
Pin 5Paddle right pot / Mouse button 3 (I/O)
Pin 6Fire button / Mouse button 1 / Light pen trigger (I/O)
Pin 7+5V (current-limited on A1000, direct on A500/A2000)
Pin 8GND
Pin 9Paddle left pot / Mouse button 2 (I/O)

Internal Chip Connections

Gameport 0 Signal Routing
Pins 1–4Denise — M0V, M0H, M1V, M1H (via multiplexer)
Pin 5Paula — P0Y (analog potentiometer input)
Pin 6CIA-A PA6 and Agnus LP (light pen input)
Pin 9Paula — P0X (analog potentiometer input)
Gameport 1 Signal Routing
Pins 1–4Denise — M0V, M0H, M1V, M1H (via multiplexer)
Pin 5Paula — P1Y (analog potentiometer input)
Pin 6CIA-A PA7
Pin 9Paula — P1X (analog potentiometer input)

All button and directional signals are active-low — internal switches connect the input pin to GND when pressed (HIGH = open, LOW = closed). The analog inputs (P0X, P0Y, P1X, P1Y) accept 470 Kohm variable resistors (potentiometers) connected between +5V and the input pin.

Power Protection

On the A1000, the +5V supply to both game ports is protected by a current limiter that separates continuous short-circuit current (400 mA) from peak surges (700 mA). Total current draw across both ports must not exceed 250 mA. This protection was removed on the A500 and A2000 models.

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Expansion Port

The expansion port is an 86-pin edge connector that exposes all important bus and control signals from the 68000 processor. It allows connection of memory expansions, accelerator boards, and other peripherals. On the A1000, it is located near the game ports behind a plastic cover. On the A500, it is on the underside of the unit. Pin spacing is 0.1 inch (2.54 mm).

The A2000 has a different arrangement: one 86-pin connector plus five 100-pin Zorro bus slots for expansion cards.

Expansion Port Pinout (86-pin, selected signals)
1–4GND
5–6+5V
8-5V
9Extension (28 MHz on A2000)
10+12V
14/C3 — 3.58 MHz clock phase
15CDAC — 7.16 MHz clock
16/C1 — 3.58 MHz clock phase
17/OVR — Override (auto-configuration)
18XRDY — Expansion ready
19/INT2 — Level 2 interrupt (to Paula)
22/INT6 — Level 6 interrupt (to Paula)
21–59A1–A23 — 68000 address bus
63–86PD0–PD15 — 68000 data bus
40–44/IPL0–/IPL2 — Interrupt priority level
31–35FC0–FC2 — 68000 function codes
74/AS — Address strobe
72/UDS — Upper data strobe
70/LDS — Lower data strobe
68/R/W — Read/Write
66/DTACK — Data acknowledge
53/RES — System reset
55/HLT — Halt
46/BERR — Bus error
60/BR — Bus request
64/BG — Bus grant
62/BGACK — Bus grant acknowledge
48/VPA — Valid peripheral address
50E — 68000 E clock (716 KHz)
51/VMA — Valid memory address

Clock Signals

The expansion port provides several clock references. CDAC runs at 7.16 MHz. /C1 and /C3 are 3.58 MHz signals with different phases. On the A2000, the 28.64 MHz master oscillator is also available (pin 9). The relationship between these clocks and the internal 7M, CCK, and CCKQ signals can be derived from their phase diagrams.

Configuration Signals

/OVR, XRDY, and PALOPE (A500/A1000 only) serve the auto-configuration protocol for expansion cards. Pins marked "extension" are reserved for future use. On the A2000, some have already been allocated (e.g., the 28 MHz clock).

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Power Supply

Each Amiga connector carries one or more supply voltages. The total current budget depends on the model and how many ports are loaded simultaneously.

A1000 Maximum Current Per Connector (Commodore-recommended)
RGB+5V: 300 mA | +12V: 175 mA | -5V: 50 mA
RS-232+5V: 100 mA | +12V: 50 mA | -5V: 50 mA
Ext. Floppy+5V: 270 mA | +12V: 160 mA
Centronics+5V: 100 mA
Expansion+5V: 1000 mA | +12V: 50 mA | -5V: 50 mA
TV Modulator+12V: 60 mA
Gameport 0+5V: 125 mA
Gameport 1+5V: 125 mA

These values assume all connectors are loaded simultaneously. If some connectors are unused, their current budget is available to others. The A1000 power supply can deliver over 8A during a short circuit, so experimentation should be done with caution.

The A500 has a smaller power supply — external power is recommended for current-hungry expansions. The A2000 has a larger supply to support multiple expansion cards, including IBM emulation boards.

Note: the A500 provides -12V on its negative rail, while the A1000 provides -5V.