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$000000

Memory Map

The Amiga's 68000 has a 24-bit address bus, giving a 16 MB address space ($000000–$FFFFFF). This space is divided between RAM, custom chip registers, CIA registers, expansion space, and ROM. Gary (the address decoder chip) determines which device responds to each bus cycle.

$000000
Chip RAM
512 KB ($000000–$07FFFF) — expandable to 1 MB with Fat Agnus
$080000
Chip RAM (extended)
512 KB ($080000–$0FFFFF) — with 1 MB Agnus only
$100000
Reserved
$100000–$1FFFFF — unused on stock A500
$200000
Fast RAM (expansion)
$200000–$9FFFFF — up to 8 MB via trapdoor or Zorro
$A00000
Reserved / Expansion
$A00000–$BEFFFF — I/O expansion space
$BFD000
CIA-B (8520)
Even addresses: $BFD000, $BFD100, $BFD200, …
$BFE001
CIA-A (8520)
Odd addresses: $BFE001, $BFE101, $BFE201, …
$C00000
Slow RAM (A500 trapdoor)
$C00000–$D7FFFF — 512 KB "Slow" expansion RAM
$D80000
Reserved
$D80000–$DFFFFF
$DFF000
Custom Chip Registers
$DFF000–$DFF1FF — ~200 registers (Agnus, Denise, Paula)
$E00000
Reserved / Expansion ROM
$E00000–$E7FFFF
$E80000
Autoconfig Space
$E80000–$EFFFFF — Zorro II autoconfig registers
$F00000
Reserved
$F00000–$F7FFFF
$F80000
Reserved / Diagnostic ROM
$F80000–$FBFFFF
$FC0000
Kickstart ROM
$FC0000–$FFFFFF — 256 KB (Kickstart 1.2/1.3)
$000000

Chip RAM vs. Fast RAM

The most important distinction in the Amiga memory map is between Chip RAM and Fast RAM.

Chip RAM ($000000–$07FFFF, or $0FFFFF with Fat Agnus) is accessible by both the 68000 and the custom chips. All data that the custom chips need — bitplane graphics, sprites, audio samples, Copper lists, Blitter sources — must reside in Chip RAM. This is because Agnus generates the DMA addresses and can only address the lower portion of memory.

Fast RAM ($200000 and up) is accessible only by the 68000. The custom chips cannot see it. The advantage is that the 68000 gets full-speed access without contention from DMA — hence "fast." Programs and data structures that don't need DMA access should be placed in Fast RAM when available.

Slow RAM ($C00000–$D7FFFF) is the A500's trapdoor expansion RAM. Despite being in the "fast" address range, it sits on the Chip bus and is subject to DMA contention — so it's slower than true Fast RAM but inaccessible to the custom chips. It's the worst of both worlds, but better than no expansion at all.

$000000

CIA Address Space

The two CIA 8520 chips occupy a peculiar position in the memory map. CIA-A is addressed at odd byte addresses starting at $BFE001, and CIA-B at even addresses starting at $BFD000. This unusual arrangement is a side effect of how Gary decodes addresses and connects the CIAs to different halves of the data bus.

Each CIA has 16 registers, spaced 256 bytes apart (only A0–A3 and A8–A11 are decoded):

CIA-A Register Addresses
$BFE001PRA — Port A data (accent on accent on fire buttons, overlay, LED)
$BFE101PRB — Port B data (parallel port accent on accent data)
$BFE201DDRA — Data direction register A
$BFE301DDRB — Data direction register B
$BFE401TALO — Timer A low byte
$BFE501TAHI — Timer A high byte
$BFE601TBLO — Timer B low byte
$BFE701TBHI — Timer B high byte
$BFE801TODLO — TOD counter low (1/10 seconds)
$BFE901TODMID — TOD counter mid (seconds)
$BFEA01TODHI — TOD counter high (minutes)
$BFEC01SDR — Serial data register
$BFED01ICR — Interrupt control register
$BFEE01CRA — Control register A
$BFEF01CRB — Control register B

Because CIAs use the 6800-compatible synchronous bus protocol (via VPA̅/VMA̅/E clock), each CIA access takes approximately 1.4 µs — about 5× slower than a custom chip register access.

$000000

Custom Chip Register Space

The custom chip registers occupy $DFF000–$DFF1FF — 512 bytes containing approximately 200 individual registers. Many are write-only (the 68000 can write values but not read them back), while read registers have different functions at the same address.

The registers are organized by subsystem within this space:

Register Space Layout
$000–$03ESystem: BLTDDAT, DMACONR, VPOSR, VHPOSR, DSKDAT, JOYxDAT, CLXDAT, POTINP, SERDATR, DSKBYTR, INTENAR, INTREQR
$040–$07EBlitter: BLTCONx, BLTxPT, BLTxMOD, BLTxDAT, BLTSIZE, BLTxFWM/LWM
$080–$08ECopper: COPxLC, COPJMPx, COPCON, DIWSTRT, DIWSTOP
$090–$09EControl: DDFSTRx, DMACON, CLXCON, INTENA, INTREQ
$0A0–$0DFAudio: AUDxLCH/L, AUDxLEN, AUDxPER, AUDxVOL, AUDxDAT (×4 channels)
$0E0–$0FEBitplane pointers: BPLxPTH/L (×6 planes)
$100–$10EBitplane control: BPLCONx, BPLxMOD
$110–$11EBitplane data: BPLxDAT
$120–$17ESprite: SPRxPT, SPRxPOS, SPRxCTL, SPRxDATA, SPRxDATB (×8)
$180–$1BEColor: COLOR00–COLOR31

The Copper is restricted from accessing registers below $040 (to prevent it from reprogramming the DMA controller or itself). With COPCON bit 0 set, it can additionally access $040–$07E (Blitter registers).

$000000

ROM and Overlay

The Amiga's operating system, Kickstart, resides in ROM at $FC0000–$FFFFFF (256 KB on the A500). At power-on, the 68000 reads its reset vectors from address $000000. Since RAM contains garbage at this point, Gary activates the ROM overlay, temporarily mirroring the Kickstart ROM at $000000. The overlay is disabled when the first write to CIA-A bit 0 (OVL) occurs — at that point, $000000 reverts to Chip RAM and the ROM is only visible at $FC0000.

A1000 WOM (Write-Once Memory)

The A1000 had no ROM — instead it had a WOM (Write-Once Memory), a 256 KB area of write-once RAM at $FC0000. At power-on, a small bootstrap ROM (8 KB) at $F80000 loaded Kickstart from floppy disk into the WOM. Once written, the WOM could not be modified until the next reset. This allowed the A1000 to use different Kickstart versions simply by booting from a different disk — a flexibility that was abandoned in later models in favor of the simpler and faster mask ROM approach.